Type 4 Common Devices 

Memory supported, cache, features 
Support for Convenience Partition on >3.94GB Drives
BIOS releases
    Flash BIOS 05 from BIOS 03 or less
    BIOS Level Revison Features
FDIV Replacement
Diagnostic LEDs
"Q" / Upgrade Pentium 66 MHz   92F0120
      Intel Pentium Overdrive 133MHz (POD133/120)
      Possible Q Upgrade Success! (Tim Clarke reutrns!)
496 vs. 497 Cache Controller

C39 22uF capacitor not present on P complex. Possible power filter?
CR1-CR2 Diagnostic LEDs. CR1 lights momentarily at the start of POST, then turns off, CR2 stays on during POST, then turns off..
J6  Present on some P60/P66 complexes. Function unknown
U17   A82496-66 Cache controller 
U23   10G3441  SynchroStream Controller versions 

Outline Left of CPU Unknown. Maybe for a component that used four mounting posts to match the pattern. The right pair have thick PCB traces going to them. Maybe a VRM?

Q Complex Back

OS2 40 MHz MCA Bus Clock

 From Dr. Jim Shorney 
   Overdrive processors are not compatible with the '496 cache controller on the P60/66 complexes.  However...  I swapped out the '496 cache controller on mine for a borrowed '497 (well heatsinked)  and was able to boot DOS with a POD 133 on my P60 (overclocked to 66).  It wasn't entirely stable, and would not boot OS/2 Warp 4.0 or NT 4.0.  The Powerleap PL54C interposer was still dead in this configuration.  There may yet be hope, I haven't tried the Powerleap with anything other than an Intel 166 yet, and I may also downclock the complex back to 60 MHz and see what happens.  There may yet be hope... 
      The '497 reportedly has a 3.3v core, but it seemed to run stable and reliable for several hours with the stock P60 CPU in my system in place of the 5v '496.   I briefly looked over the docs this afternoon (712 pages, wow...). Seems the '497 is still a 5v part, it is the I/O buffers that connect to the CPU that are 3.3v.  This probably explains in part why the chip doesn't self-destruct in the '496 socket.  It also seems to invalidate the need for an  interposer, since the P60/66 I/O is 5v anyway and the buffers would have to run at 5v to interface at all with the CPU.  This brings up the question of noise immunity, though - will circuits designed to run at 3.3v logic levels be more or less sensitive to noise or poor signal quality when run at 5v?  Inquiring minds want to know. 

From Tony Ingenoso
    I suspect noise is going to be less of a problem at higher voltages Jim.  In theory, the voltage range for correct operation would be wider(particularly for CMOS).  The only reason I ever saw (other than laptop applications) for the drive to lower voltages was to limit heat as the gate counts and frequencies went up.  CMOS parts like high voltages -- you can crank clock speeds faster with higher voltages(the standard overclockers trick).  Discrete type CMOS parts can often be run as high as 20V and work fine.  The downside is that its power characteristics start approaching those of TTL at the higher speeds (and heat goes up).  If the only nominally 3.3V sections of the cache controller are the line drivers/buffers, there's probably not going to be enough stuff getting overvoltaged to make any significant difference in the power draw.